1. Field of the Invention
The present invention relates to semiconductor devices generally and in particular to a method for manufacturing a low resistance via without a bottom liner.
2. Description of Related Art
Semiconductor devices employ interconnect wiring structures having multiple levels of metal lines (wires) and dielectric layers (insulator). The lines may take the form of etched films on the dielectric surface, or embedded metal wires fabricated in trenches in the dielectric. A via is a vertical connection, usually circular or rectangular in cross-section, which electrically connects wires on different levels, above and below the via. During processing, an adhesion diffusion barrier liner layer is used to line the via openings to separate the conductive metal forming the via from the surrounding dielectric matrix in the same layer level. The adhesion diffusion barrier or liner layer is an important element for the successful operation of the semiconductor structure. It is frequently formed of a material, or materials that are impermeable to the materials that form the via electrical conductor, such as aluminum (Al) or copper (Cu). Its function is to provide adhesion and prevent the diffusion of the conductor material into the dielectric matrix material which would lead to electrical and structural problems. A suitable liner may be formed of titanium nitride (TiN).
When scaling down semiconductor device geometry, problems arise because of decreasing contact/via size for different metal layer connection. When the device geometry shrinks to be less than 10 nm, via resistance will be more important for performance of the device. Via resistance arises from two sources: 1) the main body of metal line (Cu), and 2) the liner layer at the bottom of the via. Due to much higher electrical resistivity of liner materials as compared to the copper lines, the liner layer at via bottom is a major contributor to the total via resistance.
It would be useful to thin down the liner or remove the liner completely at via bottom to reduce the via resistance. The prior art has not provided an effective way of achieving that, while still protecting the via sidewall and top liner.